The process is compatible to the existing double poly-silicon self-aligned NPN transistor process, which can be used to fabricate high-performance complementary bipolar circuits. 该工艺与已有的双层多晶硅自对准NPN晶体管工艺相兼容,可用于制造高性能的互补双极电路。
Regardless of type NPN or PNP-type tubes, the internal transistor has three areas, namely, the launch area, base, collector area, the three areas form two PN junction. 无论NPN型还是PNP型管,三极管内部均有三个区、即发射区、基区、集电区,三个区形成两个PN结。
Kyanite-sillimanite type facies series silicon npn mesa transistor 蓝晶石-硅线石型相系
A super β NPN transistor is developed. And the volume production process of the device is described. 阐述了一种超βNPN型晶体管的研制及实现批量生产的过程。
Ga base region was formed using low concentration doping-junction depth process-high concentration doping method, and the NPN transistor sample was prepared. 利用低浓度掺杂-结深推移-高浓度掺杂设计方法形成Ga基区,制备出NPN晶体管样品。
The low phase noise potential of K-band VCO using NPN silicon-Germanium transistor with low noise floor, high cut-off frequency ( 70GHz) and high collector current capacity has been studied in detail. 因此在设计中,选用了具有低噪声基底、高截止频率(70GHz)、高集电极电流容量的锗化硅材料的NPN晶体管,有利于提高系统的噪声性能。
A novel silicon photoelectric negative resistance device& photoelectric dual coupled areas transistor ( PDUCAT) is proposed, which is composed of a P+ N photoelectric diode and two vertical NPN transistors beside the diode oppositely. 提出了一种新型结构的硅光电负阻器件&光电双耦合区晶体管(photoelectricdualcoupledareatransistor,PDUCAT),它是由一个P+N结光电二极管和位于两侧的两个纵向NPN管构成的。
Development of a Super β NPN Transistor 一种超βNPN晶体管的研制
A vertical PNP transistor with P-buried collector is used as injector which is merged with the downward operating NPN transistor. 该结构采用P埋集电极纵向PNP晶体管作注入器,巧妙地实现了与正常向下工作的NPN晶体管并合。
The device is constructed with a double base, double collector npn transistor. 器件结构是双基极、双集电极npn晶体管。
Study on Characteristics of 4H-SiC npn Bipolar Transistor 4H-SiCnpn双极晶体管特性研究
To show the potential advantages in high frequeucy and low noise performances, an Npn GaAs transistor with a fine structure, as an example, is proposed. 给出了一个细线条结构的NpnGaAs晶体管作为进一步考察高频和噪声性能的实例。
A Model for the Technique Parameter Calculation of Up-diffused I~ 2L NPN Transistor Base 上扩散I~2L电路中纵向npn管基区工艺参数的近似计算模型
The design and property study of a new NPN vertical dual carrier field effect transistor 新型垂直沟道的NPN型偶载场效应晶体管的设计及特性
Then, DC characteristics of the transistor are described by using a mathematical model, the calculated current gain is obtained and an optimal design scheme of a Bi-CMOS npa bipolar transistor fully-compatible with CMOS process is presented. 然后,建立了分析计算晶体管直流特性的数学模型,并分析计算了工艺参数、器件结构对器件性能的影响,给出了CMOS工艺全兼容的Bi-CMOS双极型npn晶体管的最佳设计方案。